Invention Grant
- Patent Title: Three-dimensional stacked semiconductor integrated circuit
- Patent Title (中): 三维堆叠半导体集成电路
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Application No.: US12970907Application Date: 2010-12-16
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Publication No.: US08411478B2Publication Date: 2013-04-02
- Inventor: Tae Sik Yun , Young Jun Ku
- Applicant: Tae Sik Yun , Young Jun Ku
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2010-0095661 20100930
- Main IPC: G11C5/06
- IPC: G11C5/06

Abstract:
Various embodiments of a three-dimensional, stacked semiconductor integrated circuit are disclosed. In one exemplary embodiment, the circuit may include a master slice, a plurality of slave slices, and a plurality of through-silicon vias for connecting the master slice to the plurality of slave slices. At least one of the plurality of through-silicon vias may be configured to transmit an operation control signal from the master slice to the plurality of slave slices. The at least one of the plurality of through-silicon vias is configured to be shared by the plurality of slave slices.
Public/Granted literature
- US20120081984A1 THREE-DIMENSIONAL STACKED SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2012-04-05
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