A method of writing into a semiconductor memory device, which includes a resistance memory element 14 which memorizes a high resistance state and a low resistance state and switches between the high resistance state and the low resistance state by an application of a voltage; a transistor 12 including a drain terminal connected to one terminal of the resistance memory element 14 and a source terminal connected to a reference voltage; and a transistor 16 including a source terminal connected to the other terminal of the resistance memory element 14. When a write voltage is applied to the resistance memory element 14 via the transistor 16 to switch the resistance memory element 14 from the low resistance state to the high resistance state, a voltage to be applied to the resistance memory element 14 is controlled at a value which is not less than a reset voltage of the resistance memory element 14 and less than a set voltage of the resistance memory element 14 by controlling a voltage to be applied to a gate terminal of the transistor 16 so as to be set at a value which is not less than a total of the reset voltage and a threshold voltage of the transistor 16 and is less than a total of the set voltage and the threshold voltage of the transistor 16.