Invention Grant
US08411523B2 Reduced current requirements for DRAM self-refresh modes via staggered refresh operations of subsets of memory banks or rows 有权
通过存储器组或行的子集的交错刷新操作,减少DRAM自刷新模式的电流要求

  • Patent Title: Reduced current requirements for DRAM self-refresh modes via staggered refresh operations of subsets of memory banks or rows
  • Patent Title (中): 通过存储器组或行的子集的交错刷新操作,减少DRAM自刷新模式的电流要求
  • Application No.: US12890083
    Application Date: 2010-09-24
  • Publication No.: US08411523B2
    Publication Date: 2013-04-02
  • Inventor: Kuljit S. Bains
  • Applicant: Kuljit S. Bains
  • Applicant Address: US CA Santa Clara
  • Assignee: Intel Corporation
  • Current Assignee: Intel Corporation
  • Current Assignee Address: US CA Santa Clara
  • Agency: Blakely, Sokoloff, Taylor & Zafman LLP
  • Main IPC: G11C7/00
  • IPC: G11C7/00
Reduced current requirements for DRAM self-refresh modes via staggered refresh operations of subsets of memory banks or rows
Abstract:
Embodiments of the invention describe systems, methods, and apparatuses to reduce the instantaneous power necessary to execute a DRAM device initiated self-refresh. Embodiments of the invention describe a DRAM device enabled to stagger self-refreshes between a plurality of banks. Staggering self-refreshes between banks reduces the current required for a DRAM self-refresh, thus reducing the amount of current required by the DRAM device.
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