Invention Grant
US08412886B2 Cache controller and control method for controlling access requests to a cache shared by plural threads that are simultaneously executed
失效
用于控制对同时执行的多个线程共享的高速缓存的访问请求的缓存控制器和控制方法
- Patent Title: Cache controller and control method for controlling access requests to a cache shared by plural threads that are simultaneously executed
- Patent Title (中): 用于控制对同时执行的多个线程共享的高速缓存的访问请求的缓存控制器和控制方法
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Application No.: US12654310Application Date: 2009-12-16
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Publication No.: US08412886B2Publication Date: 2013-04-02
- Inventor: Naohiro Kiyota
- Applicant: Naohiro Kiyota
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Main IPC: G06F13/18
- IPC: G06F13/18 ; G06F12/00

Abstract:
In such a configuration that a port unit is provided which takes a form being shared among threads and has a plurality of entries for holding access requests, and the access requests for a cache shared by a plurality of threads being executed at the same time are controlled using the port unit, the access request issued from each tread is registered on a port section of the port unit which is assigned to the tread, thereby controlling the port unit to be divided for use in accordance with the thread configuration. In selecting the access request, the access requests are selected for each thread based on the specified priority control from among the access requests issued from the threads held in the port unit, thereafter a final access request is selected in accordance with a thread selection signal from among those selected access requests. In accordance with such a configuration, the cache access processing can be carried out while reducing the amount of resources of the port unit and assuring effective use of such resources.
Public/Granted literature
- US20100100686A1 Cache controller and control method Public/Granted day:2010-04-22
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