Invention Grant
- Patent Title: Macroscalar processor architecture
- Patent Title (中): Macroscalar处理器架构
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Application No.: US13298739Application Date: 2011-11-17
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Publication No.: US08412914B2Publication Date: 2013-04-02
- Inventor: Jeffry E. Gonion
- Applicant: Jeffry E. Gonion
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Main IPC: G06F9/45
- IPC: G06F9/45

Abstract:
A method for aggregating a program loop in a Macroscalar architecture includes identifying one or more instructions of the program loop having a branch instruction that causes the program loop to branch dependent upon a predicate condition after a memory write operation. The method also includes modifying at least one of the one or more instructions to cause a processor executing the one or more instructions to branch after the memory write operation executed as a vector block for iterations prior to and including an iteration during which the predicate condition is satisfied.
Public/Granted literature
- US20120066482A1 MACROSCALAR PROCESSOR ARCHITECTURE Public/Granted day:2012-03-15
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