Invention Grant
US08413016B2 Nonvolatile memory device and controller for judging a normal or anomalous condition of an error-corrected bit pattern
有权
用于判断错误校正的位模式的正常或异常状态的非易失性存储器件和控制器
- Patent Title: Nonvolatile memory device and controller for judging a normal or anomalous condition of an error-corrected bit pattern
- Patent Title (中): 用于判断错误校正的位模式的正常或异常状态的非易失性存储器件和控制器
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Application No.: US12768171Application Date: 2010-04-27
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Publication No.: US08413016B2Publication Date: 2013-04-02
- Inventor: Toshiyuki Honda
- Applicant: Toshiyuki Honda
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: JP2009-109189 20090428
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
In a nonvolatile memory device of the present application, when data of each write unit is read from a nonvolatile memory, an all-clear detector detects whether the read data is already cleared, and a control portion judges whether a flag is already written into a written flag area of the data that has been descrambled by a descrambler and then corrected by an error detection and correction portion. Using a scramble pattern that is generated by a scramble pattern generator and corresponds to the written flag area, a predetermined bit pattern is scrambled to a state that differs from the cleared state.
Public/Granted literature
- US20100275094A1 NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY CONTROLLER Public/Granted day:2010-10-28
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