Invention Grant
- Patent Title: Execution monitor for electronic design automation
- Patent Title (中): 电子设计自动化执行监视器
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Application No.: US12423955Application Date: 2009-04-15
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Publication No.: US08413103B2Publication Date: 2013-04-02
- Inventor: Andrew Stanley Potemski , John Scott Tyson , Steven Robert Eustes
- Applicant: Andrew Stanley Potemski , John Scott Tyson , Steven Robert Eustes
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Agent Laxman Sahasrabuddhe
- Main IPC: G06F15/04
- IPC: G06F15/04 ; G06F17/50

Abstract:
Embodiments of a computer system, a method, a graphical user interface and a computer-program product (i.e., software) for use with the computer system are described. A chip designer may use these devices and techniques to configure and monitor the execution of tasks in a user-configurable electronic-design-automation (EDA) flow associated with a circuit or chip design. In particular, using an intuitive and interactive graphical user interface in EDA software, the chip designer can configure and initiate execution of the EDA flow. Then, during execution of EDA tasks in the EDA flow, an execution monitor in the graphical user interface may provide a graphical representation of real-time execution status information for the EDA tasks. Moreover, using the EDA software, the chip designer can debug the circuit or chip design if any errors or problems occur.
Public/Granted literature
- US20100235795A1 EXECUTION MONITOR FOR ELECTRONIC DESIGN AUTOMATION Public/Granted day:2010-09-16
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