Invention Grant
- Patent Title: Transaction level model synthesis
- Patent Title (中): 交易级模型综合
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Application No.: US10976402Application Date: 2004-10-28
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Publication No.: US08413106B1Publication Date: 2013-04-02
- Inventor: Serge Goossens
- Applicant: Serge Goossens
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fenwick & West LLP
- Main IPC: G06F9/44
- IPC: G06F9/44

Abstract:
Converting from transaction level model to register transfer level. A method comprises accessing a transaction level model description. Function calls in the transaction level model description are automatically converted to signal accesses in a register transfer level description. Interlace logic is automatically generated in the register transfer level description. The interface logic provides an interface between a bus interface and the signal accesses. The register transfer level description is stored in a computer readable medium.
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