Invention Grant
US08415206B2 Integrated circuit packaging system with lead frame etching and method of manufacture thereof
有权
具有引线框架蚀刻的集成电路封装系统及其制造方法
- Patent Title: Integrated circuit packaging system with lead frame etching and method of manufacture thereof
- Patent Title (中): 具有引线框架蚀刻的集成电路封装系统及其制造方法
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Application No.: US13070899Application Date: 2011-03-24
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Publication No.: US08415206B2Publication Date: 2013-04-09
- Inventor: Zigmund Ramirez Camacho
- Applicant: Zigmund Ramirez Camacho
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method of manufacture of an integrated circuit packaging system includes: providing a pre-plated leadframe having a contact pad and a die paddle pad; forming an isolated contact from the pre-plated leadframe and the contact pad; mounting an integrated circuit die over the die paddle pad; and encapsulating with an encapsulation the integrated circuit die and the isolated contact, the encapsulation having a bottom surface which is planar and exposing in the bottom surface only the contact pad and the die paddle pad.
Public/Granted literature
- US20120241962A1 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME ETCHING AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2012-09-27
Information query
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