Invention Grant
US08415666B2 Thin film transistor substrate having thin film transistors with improved etching characteristics, method of manufacturing the same, and display apparatus having the same 有权
具有改善蚀刻特性的薄膜晶体管的薄膜晶体管基板及其制造方法以及具有该薄膜晶体管的显示装置

  • Patent Title: Thin film transistor substrate having thin film transistors with improved etching characteristics, method of manufacturing the same, and display apparatus having the same
  • Patent Title (中): 具有改善蚀刻特性的薄膜晶体管的薄膜晶体管基板及其制造方法以及具有该薄膜晶体管的显示装置
  • Application No.: US12405978
    Application Date: 2009-03-17
  • Publication No.: US08415666B2
    Publication Date: 2013-04-09
  • Inventor: Jong-Moo HuhJoon-Hoo Choi
  • Applicant: Jong-Moo HuhJoon-Hoo Choi
  • Applicant Address: KR
  • Assignee: Samsung Display Co., Ltd.
  • Current Assignee: Samsung Display Co., Ltd.
  • Current Assignee Address: KR
  • Agency: Innovation Counsel LLP
  • Priority: KR10-2008-0053768 20080609
  • Main IPC: H01L33/00
  • IPC: H01L33/00
Thin film transistor substrate having thin film transistors with improved etching characteristics, method of manufacturing the same, and display apparatus having the same
Abstract:
In a thin film transistor substrate, an active pattern of a thin film transistor includes a lower semiconductor pattern and an upper semiconductor pattern that are patterned through different process steps. The lower semiconductor pattern defines a channel area of the thin film transistor, and the upper semiconductor pattern is connected to a side portion of the lower semiconductor pattern and makes contact with the source electrode and the drain electrode. An etch stop layer is formed on the lower semiconductor pattern corresponding to the channel area, and the etch stop layer is formed through the same patterning process as the lower semiconductor pattern. Also, an ohmic contact pattern is formed on the upper semiconductor pattern, and the ohmic contact pattern is formed by the same patterning process as the upper semiconductor pattern.
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