Invention Grant
US08415672B2 Transistor with etching stop layer and manufacturing method thereof
有权
具有蚀刻停止层的晶体管及其制造方法
- Patent Title: Transistor with etching stop layer and manufacturing method thereof
- Patent Title (中): 具有蚀刻停止层的晶体管及其制造方法
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Application No.: US13006580Application Date: 2011-01-14
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Publication No.: US08415672B2Publication Date: 2013-04-09
- Inventor: Chin-Wei Hu , Ching-Sang Chuang , Chia-Yu Chen
- Applicant: Chin-Wei Hu , Ching-Sang Chuang , Chia-Yu Chen
- Applicant Address: TW Hsin-Chu
- Assignee: AU Optronics Corporation
- Current Assignee: AU Optronics Corporation
- Current Assignee Address: TW Hsin-Chu
- Agency: McClure, Qualey & Rodack, LLP
- Priority: TW99129110A 20100830
- Main IPC: H01L29/786
- IPC: H01L29/786

Abstract:
This invention provides a transistor with an etching stop layer and a manufacturing method thereof. The transistor structure includes a substrate, a crystalline semiconductor layer, an etching stop structure, an ohmic contact layer, a source, a drain, a gate insulating layer, and a gate. The manufacturing method is performed by patterning the ohmic contact layer and the crystalline semiconductor layer at the same time with the same mask; and patterning the ohmic contact layer and the source/drain layer at the same time with another the same mask.
Public/Granted literature
- US20120049195A1 TRANSISTOR WITH ETCHING STOP LAYER AND MANUFACTURING METHOD THEREOF Public/Granted day:2012-03-01
Information query
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