Invention Grant
- Patent Title: High voltage vertical channel transistors
- Patent Title (中): 高压垂直沟道晶体管
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Application No.: US13253408Application Date: 2011-10-05
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Publication No.: US08415741B2Publication Date: 2013-04-09
- Inventor: Yoshihiro Takaishi
- Applicant: Yoshihiro Takaishi
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2007-254172 20070928
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
A semiconductor device includes low voltage and high voltage transistors over a substrate. The low voltage transistor is configured by at least one unit transistor. The high voltage transistor is configured by a greater number of the unit transistors than the at least one unit transistor that configures the low voltage transistor. Each of the unit transistors may include a vertically extending portion of semiconductor providing a channel region and having a uniform height, a gate insulating film extending along a side surface of the vertically extending portion of semiconductor, a gate electrode separated by the gate insulating film from the vertically extending portion of semiconductor, and upper and lower diffusion regions being respectively disposed near the top and bottom of the vertically extending portion of semiconductor. The greater number of the unit transistors are connected in series to each other and have gate electrodes eclectically connected to each other.
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