Invention Grant
- Patent Title: Clock signal generation circuit and semiconductor device
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Application No.: US12609422Application Date: 2009-10-30
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Publication No.: US08416000B2Publication Date: 2013-04-09
- Inventor: Masami Endo
- Applicant: Masami Endo
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2007-117849 20070427
- Main IPC: H03K3/017
- IPC: H03K3/017 ; H03K5/135 ; H03K7/08

Abstract:
In a semiconductor device capable of radio communication, a stable clock signal is generated even if a reference clock signal for generating a clock signal has varied frequencies in each cycle. A clock signal generation circuit includes an edge detection circuit that detects an edge of an input signal and generates a synchronization signal, a reference clock signal generation circuit that generates a clock signal which functions as reference, a counter circuit that counts the number of edges of rise of the reference clock signal in accordance with the synchronization signal, a duty ratio selection circuit that selects a duty ratio of a clock signal from a count value, and a frequency division circuit that generates the clock signal having the selected duty ratio.
Public/Granted literature
- US20100045355A1 CLOCK SIGNAL GENERATION CIRCUIT AND SEMICONDUCTOR DEVICE Public/Granted day:2010-02-25
Information query
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