Invention Grant
US08416637B2 Semiconductor memory apparatus, and circuit and method for controlling faulty address therein
有权
半导体存储装置，以及用于控制其中的错误地址的电路和方法
- Patent Title: Semiconductor memory apparatus, and circuit and method for controlling faulty address therein
- Patent Title (中): 半导体存储装置，以及用于控制其中的错误地址的电路和方法
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Application No.: US12836505Application Date: 2010-07-14
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Publication No.: US08416637B2Publication Date: 2013-04-09
- Inventor: Woo Jin Rim
- Applicant: Woo Jin Rim
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2009-0130710 20091224
- Main IPC: G11C17/18
- IPC: G11C17/18
Abstract:
A faulty address control circuit comprises a variable resistance fuse unit configured to be driven in response to an address signal, a resistance value of the variable resistance fuse unit being determined based on an amount of an applied current; a driving unit configured to output a driving signal based on the resistance value of the variable resistance fuse unit in response to a faulty address control signal; and an address storage and determination unit configured to receive the address signal, be driven by the driving signal to output the address signal or an inverted signal of the address signal.
Public/Granted literature
- US20110157969A1 SEMICONDUCTOR MEMORY APPARATUS, AND CIRCUIT AND METHOD FOR CONTROLLING FAULTY ADDRESS THEREIN Public/Granted day:2011-06-30
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