Invention Grant
US08417985B2 Adjusting system clock to faster speed upon receiving mass storage command and back to lower speed upon completion of all commands
有权
在接收到大容量存储命令后，将系统时钟调整到更快的速度，并在完成所有命令后恢复到较低的速度
- Patent Title: Adjusting system clock to faster speed upon receiving mass storage command and back to lower speed upon completion of all commands
- Patent Title (中): 在接收到大容量存储命令后，将系统时钟调整到更快的速度，并在完成所有命令后恢复到较低的速度
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Application No.: US12782501Application Date: 2010-05-18
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Publication No.: US08417985B2Publication Date: 2013-04-09
- Inventor: Philip David Rose
- Applicant: Philip David Rose
- Applicant Address: US CA Sunnyvale
- Assignee: PLX Technology, Inc.
- Current Assignee: PLX Technology, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Beyer Law Group LLP
- Main IPC: G06F1/04
- IPC: G06F1/04
Abstract:
In a first embodiment of the present invention, a method for dynamically adjusting a system clock of a plurality of system clock-controlled components in a system is provided, the method comprising: detecting the receipt of a command at a non-system clock-controlled component of the system; and adjusting the system clock to a fast speed based on the detecting. This embodiment may also include: determining that the command has been completed; determining that there are no outstanding commands in the plurality of system clock-controlled components; and adjusting the system clock to a slow speed based on the determination that there are no outstanding commands in the plurality of system clock-controlled components.
Public/Granted literature
- US20110289340A1 DYNAMIC SYSTEM CLOCK RATE Public/Granted day:2011-11-24
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