One or more embodiments provide a method of HDL simulation that determines characteristics of nets, such as shorting of nets, non-blocking assignments, etc., for the entire circuit design during compilation. Simulation code and data structures are generated for each net, individually, based on the determined characteristics of the respective net. As a result, rather than implementing code for simulation of each net capable of handling every possible combination of the characteristics, less complex code and data structures may be generated for simulation of the nets.