Invention Grant
- Patent Title: Method for fabricating stack structure of semiconductor packages
- Patent Title (中): 制造半导体封装的堆叠结构的方法
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Application No.: US12955256Application Date: 2010-11-29
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Publication No.: US08420521B2Publication Date: 2013-04-16
- Inventor: Fang-Lin Tsai , Ho-Yi Tsai , Han-Ping Pu , Cheng-Hsu Hsiao
- Applicant: Fang-Lin Tsai , Ho-Yi Tsai , Han-Ping Pu , Cheng-Hsu Hsiao
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Edwards Wildman Palmer LLP
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW95114501A 20060424
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.
Public/Granted literature
- US20110070697A1 METHOD FOR FABRICATING STACK STRUCTURE OF SEMICONDUCTOR PACKAGES Public/Granted day:2011-03-24
Information query
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