Invention Grant
- Patent Title: Chip packaging method and structure thereof
- Patent Title (中): 芯片封装方法及其结构
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Application No.: US13307647Application Date: 2011-11-30
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Publication No.: US08420523B2Publication Date: 2013-04-16
- Inventor: Cheng-Ho Hsu , Kuei Pin Wan
- Applicant: Cheng-Ho Hsu , Kuei Pin Wan
- Applicant Address: TW
- Assignee: Kun Yuan Technology Co., Ltd.
- Current Assignee: Kun Yuan Technology Co., Ltd.
- Current Assignee Address: TW
- Agency: Bacon & Thomas, PLLC
- Priority: TW98119896A 20090615
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
The present invention relates to a chip packaging method and structure, in which bonding pads provided on the chip are connected by a plurality of metal wires via bonding, each of the metal wires is bending in the middle part to be higher than a predetermined height, and its ends are respectively electrically connected with two of the bonding pads. A molding layer is packaged on the chip and the molding layer is higher than the predetermined height. The molding layer is sliced at the predetermined height. Two upper breakpoints of each metal wire are exposed and a substrate is attached onto the molding layer. A plurality of circuit contacts of the substrate are respectively electrically coupled with the upper breakpoints. Whereby, the invention is capable of reducing the length of the metal wires in order to improve transmission speed, but also to reduce the volume of the packaging structure.
Public/Granted literature
- US20120070943A1 CHIP PACKAGING METHOD AND STRUCTURE THEREOF Public/Granted day:2012-03-22
Information query
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