Invention Grant
US08421201B2 Integrated circuit packaging system with underfill and methods of manufacture thereof
有权
具有底部填充剂的集成电路封装系统及其制造方法
- Patent Title: Integrated circuit packaging system with underfill and methods of manufacture thereof
- Patent Title (中): 具有底部填充剂的集成电路封装系统及其制造方法
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Application No.: US12489122Application Date: 2009-06-22
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Publication No.: US08421201B2Publication Date: 2013-04-16
- Inventor: KyungHoon Lee , DaeWook Yang , SunMi Kim
- Applicant: KyungHoon Lee , DaeWook Yang , SunMi Kim
- Applicant Address: SG Singapore
- Assignee: STATS Chippac Ltd.
- Current Assignee: STATS Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/02 ; H01L29/40
Abstract:
A method of manufacture of an integrated circuit packaging system includes: providing a device having a conductor with ends exposed on opposite sides of the device; forming a first surface depression on the device around the conductor; connecting a first component over the conductor and surrounded by the first surface depression; and applying a first underfill between the first component and the device, the first underfill substantially filled within a perimeter of the first surface depression.
Public/Granted literature
- US20100320587A1 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDERFILL AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2010-12-23
Information query
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