Invention Grant
- Patent Title: Power layout for integrated circuits
- Patent Title (中): 集成电路的电源布局
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Application No.: US12775035Application Date: 2010-05-06
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Publication No.: US08421205B2Publication Date: 2013-04-16
- Inventor: Chung-Chieh Yang
- Applicant: Chung-Chieh Yang
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman Ham & Berner, LLP
- Main IPC: H01L23/52
- IPC: H01L23/52
Abstract:
A power layout of an integrated circuit includes at least one power grid cell. Each power gird cell includes at least one first power layer configured to be coupled to a high power supply voltage and at least one second power layer configured to be coupled to a lower power supply voltage. The at least one first power layer has conductive lines in at least two different directions. The at least one second power layer has conductive lines in at least two different directions.
Public/Granted literature
- US20110272782A1 POWER LAYOUT FOR INTEGRATED CIRCUITS Public/Granted day:2011-11-10
Information query
IPC分类:
