Invention Grant
- Patent Title: Stacked memory layers having multiple orientations and through-layer interconnects
- Patent Title (中): 具有多个取向和贯穿层互连的堆叠存储层
-
Application No.: US13178262Application Date: 2011-07-07
-
Publication No.: US08421237B2Publication Date: 2013-04-16
- Inventor: Pierre Chor-Fung Chia , Li Li
- Applicant: Pierre Chor-Fung Chia , Li Li
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Brinks, Hofer, Gilson & Lione
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
In one embodiment, an apparatus includes a first memory layer oriented in a first planar orientation, a second memory layer oriented in a second planar orientation, a third memory layer oriented in the first planar orientation; and a connector that is connected to the first memory layer at an electrical contact of the first memory layer and to the third memory layer at an electrical contact of the third memory layer, where the connector is unconnected to the second memory layer. At least one of the electrical contact of the first memory layer and the electrical contact of the third memory layer comprises a through-layer via. The second planar orientation is angularly offset a predetermined number of degrees from the first planar orientation.
Public/Granted literature
- US20130009318A1 STACKED MEMORY LAYERS HAVING MULTIPLE ORIENTATIONS AND THROUGH-LAYER INTERCONNECTS Public/Granted day:2013-01-10
Information query
IPC分类: