Invention Grant
- Patent Title: Master-slave flip-flop circuit
- Patent Title (中): 主从触发器电路
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Application No.: US13067452Application Date: 2011-06-01
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Publication No.: US08421513B2Publication Date: 2013-04-16
- Inventor: Sumana Pal
- Applicant: Sumana Pal
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: H03K3/289
- IPC: H03K3/289

Abstract:
A master-slave flip-flop circuit comprises a master stage for retaining a master signal, a slave stage for retaining a slave signal and a retention stage. During a normal mode of operation, the retention stage captures a retention signal having a value dependent upon the slave signal. During a retention mode of operation, the retention stage isolates the retention signal from changes in the stage signal and retains the retention signal. During the retention mode the retention stage also provides a master restore signal to the master stage and provides a slave restore signal to the slave stage. The master restore signal and the slave restore signal have values dependent on the retention signal for configuring the master stage and slave stage such that the master and slave signals have values corresponding to the retention signal.
Public/Granted literature
- US20110298517A1 Master-slave flip-flop circuit Public/Granted day:2011-12-08
Information query
IPC分类: