A decoding circuit is adapted for decoding an input signal. The input signal includes at least a break and the time length of the break is a preset time. The decoding circuit includes a decoding unit and a detecting unit. The detecting unit detects whether the voltage level of the input signal is kept at a specific logic level for more than the preset time. If the input signal is kept at the specific logic level for more than the preset time, the detecting circuit, according to the voltage level of the specific logic level, outputs the input signal or the inverted input signal to the decoding unit so as to perform a decoding process.