Invention Grant
- Patent Title: Driving method of an electric circuit
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Application No.: US13555226Application Date: 2012-07-23
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Publication No.: US08421783B2Publication Date: 2013-04-16
- Inventor: Yukio Tanaka Tanaka
- Applicant: Yukio Tanaka Tanaka
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2000-232450 20000731
- Main IPC: G09G5/00
- IPC: G09G5/00

Abstract:
A variation in threshold may be suppressed by structuring an analog switch by a MOS transistor and forming a signal synchronized to a clock by making the clock which is a common signal in continuity or discontinuity. An object of the present invention is to reduce the variation in the signal synchronized to the clock by the variation in threshold of the MOS transistor in a circuit which is synchronized to the clock.
Public/Granted literature
- US20120287096A1 DRIVING METHOD OF AN ELECTRIC CIRCUIT Public/Granted day:2012-11-15
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