Invention Grant
- Patent Title: Display
- Patent Title (中): 显示
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Application No.: US12308571Application Date: 2007-08-08
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Publication No.: US08421784B2Publication Date: 2013-04-16
- Inventor: Patrick Zebedee
- Applicant: Patrick Zebedee
- Applicant Address: JP Osaka
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Osaka
- Agency: Harness, Dickey & Pierce
- Priority: GB0615944.6 20060811
- International Application: PCT/JP2007/065889 WO 20070808
- International Announcement: WO2008/018622 WO 20080214
- Main IPC: G09G5/00
- IPC: G09G5/00

Abstract:
In one embodiment of the present invention, a display for receiving m-bit display data includes a display driver including a switched capacitor digital/analogue converter including an n-bit input, where m is not greater than n. The upper plates of the capacitors of the switched capacitor digital/analogue converter may be connected, in the zeroing phase, to one of a plurality of reference voltages. The choice of which reference voltage is connected to the upper plates of the capacitors of the switched capacitor digital/analogue converter in the zeroing phase is independent of the input n-bit digital code, and is determined by a signal internal to the display. The output voltage range from the converter in a decoding phase may be a first range in which output voltages are above and below one reference voltage or it may be a second range in which output voltages are above and below another reference voltage, depending on which reference voltage was selected in the preceding zeroing phase.
Public/Granted literature
- US20100238146A1 Display Public/Granted day:2010-09-23
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