An active matrix substrate includes: storage capacitor line extended sections 118ax, 118qx, etc. each extending from a position on a storage capacitor line between (i) an intersection with one of two adjacent data signal lines 15 and 15q and (ii) an intersection with the other one of the two data signal lines 15 and 15q; and data signal line extended sections 15e and 15qe each extending from a position on a data signal line 15 or 15q between (i) an intersection with one of two adjacent scanning signal lines 16 and 16q and (ii) an intersection with the other one of the two adjacent scanning signal lines 16 and 16q, wherein a storage capacitor line extended section 118ax or 118ay extending from one of two adjacent storage capacitor lines 18a and 18q sandwiching no scanning signal line is connected with a storage capacitor line extended section 118qx or 118qy extending from the other one of the two adjacent storage capacitor lines 18a and 18q, wherein each of the storage capacitor line extended sections 118ax, 118ay, 118qz, and 118qy includes a section that does not overlap a pixel electrode, wherein each of the data signal line extended sections 118ax, 118ay, 118qz, and 118qy has a section overlapping a scanning signal line. This configuration makes it possible to correct a disconnection of a scanning signal line in an active matrix substrate.