A voltage (V1−V2) between a predetermined point P2 on a copper foil pattern 4 connected to a source of a switching FET (T1) and a drain P1 of the FET (T1) is input into an input terminal of a comparator CMP1 as an overcurrent determination voltage for comparison with a reference voltage V3. As this occurs, since there exists a voltage that is to be dropped by a resistor Rp possessed by the copper foil 4, the voltage (V1−V2) becomes larger than an inter-terminal voltage VDS of the FET (T1), and as a result, the effect imposed by an offset voltage Voff possessed by the comparator CMP1 can be reduced.