Invention Grant
US08422301B2 Nonvolatile semiconductor memory device and operating method thereof
失效
非易失性半导体存储器件及其操作方法
- Patent Title: Nonvolatile semiconductor memory device and operating method thereof
- Patent Title (中): 非易失性半导体存储器件及其操作方法
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Application No.: US13169414Application Date: 2011-06-27
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Publication No.: US08422301B2Publication Date: 2013-04-16
- Inventor: Yasuhiro Shiino , Eietsu Takahashi , Yuji Takeuchi
- Applicant: Yasuhiro Shiino , Eietsu Takahashi , Yuji Takeuchi
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JPP2010-212828 20100922
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
A nonvolatile semiconductor memory device in accordance with an embodiment includes a memory cell array. A control unit performs control of repeating a write operation, a write verify operation, and a step-up operation, the write operation being an operation to apply a write pulse voltage to a selected memory cell and an intermediate voltage to an unselected memory cell. The control unit controls the step-up operation such that, in a first period, the intermediate voltage is maintained at a constant value, and, in a second period, the intermediate voltage is raised by a certain value. The control unit controls the step-up operation such that the first period includes an operation to raise the write pulse voltage by a first step-up value, and the second period includes an operation to raise the write pulse voltage by a second step-up value smaller than the first step-up value.
Public/Granted literature
- US20120069672A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF Public/Granted day:2012-03-22
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