Invention Grant
- Patent Title: Non-volatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
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Application No.: US13239572Application Date: 2011-09-22
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Publication No.: US08422306B2Publication Date: 2013-04-16
- Inventor: Junya Matsunami
- Applicant: Junya Matsunami
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-271122 20101206
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/06 ; G11C16/04

Abstract:
A control circuit applies a write pulse voltage to a selected word line to perform a write operation to 1-page memory cells along the selected word line. The circuit then performs a verify read operation to confirm whether the data write to the 1-page memory cells is completed. According to the result of the verify read operation, a step-up operation is performed out to raise the write pulse voltage by a step-up voltage. The control circuit changes the amount of the step-up voltage according to a distribution width of a first threshold voltage distribution generated in process of the write operation to the memory cells.
Public/Granted literature
- US20120140558A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2012-06-07
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