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US08422323B2 Multi-bit test circuit of semiconductor memory apparatus 失效
半导体存储器件的多位测试电路

Multi-bit test circuit of semiconductor memory apparatus
Abstract:
A multi-bit test circuit for a semiconductor memory is configured to cause an active command to activate active signals. At least two active signals are respectively inputted to a plurality of banks at different timings in a multi-bit test mode.
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