Invention Grant
- Patent Title: Array substrate and method for manufacturing the same
- Patent Title (中): 阵列基板及其制造方法
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Application No.: US13150389Application Date: 2011-06-01
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Publication No.: US08426259B2Publication Date: 2013-04-23
- Inventor: Xiang Liu , Seongyeol Yoo , Jianshe Xue
- Applicant: Xiang Liu , Seongyeol Yoo , Jianshe Xue
- Applicant Address: CN Beijing
- Assignee: Beijing BOE Optoelectronics Technology Co., Ltd.
- Current Assignee: Beijing BOE Optoelectronics Technology Co., Ltd.
- Current Assignee Address: CN Beijing
- Agency: Ladas & Parry LLP
- Priority: CN201010197076 20100603
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/06

Abstract:
The present invention provides an array substrate, comprising: a base substrate; a pixel electrode pattern and a gate pattern formed on the base substrate, the gate pattern comprises a gate scanning line and a gate electrode of a transistor, both of the gate scanning line and the gate electrode comprise transparent conductive metal layer and the gate metal layer stacking on the substrate, each pixel electrode in the pixel electrode pattern comprises transparent conductive metal layer; a gate insulating layer on the pixel electrode pattern and the gate pattern, an active layer pattern on the gate insulating layer and corresponding to the gate electrode, a via hole in the gate insulating layer for exposing the pixel electrode; and a source/drain pattern on the gate insulating layer, the source/drain pattern comprises a data scanning line crossing with the gate scanning line, source and drain electrodes of the transistor, and the drain electrode is in contact with the pixel electrode through the via hole.
Public/Granted literature
- US20110297929A1 ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2011-12-08
Information query
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