Invention Grant
- Patent Title: Memory device with a textured lowered electrode
- Patent Title (中): 具有纹理降低电极的存储器件
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Application No.: US13188765Application Date: 2011-07-22
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Publication No.: US08426270B2Publication Date: 2013-04-23
- Inventor: Dipankar Pramanik
- Applicant: Dipankar Pramanik
- Applicant Address: US CA San Jose
- Assignee: Intermolecular, Inc.
- Current Assignee: Intermolecular, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/3205 ; H01L21/4763

Abstract:
Embodiments of the invention generally relate to memory devices and methods for manufacturing such memory devices. In one embodiment, a method for forming a memory device with a textured electrode is provided and includes forming a silicon oxide layer on a lower electrode disposed on a substrate, forming metallic particles on the silicon oxide layer, wherein the metallic particles are separately disposed from each other on the silicon oxide layer. The method further includes etching between the metallic particles while removing a portion of the silicon oxide layer and forming troughs within the lower electrode, removing the metallic particles and remaining silicon oxide layer by a wet etch process while revealing peaks separated by the troughs disposed on the lower electrode, forming a metal oxide film stack within the troughs and over the peaks of the lower electrode, and forming an upper electrode over the metal oxide film stack.
Public/Granted literature
- US20130023105A1 MEMORY DEVICE WITH A TEXTURED LOWERED ELECTRODE Public/Granted day:2013-01-24
Information query
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