Invention Grant
US08426286B2 Method and device for a DRAM capacitor having low depletion ratio
有权
具有低耗尽率的DRAM电容器的方法和装置
- Patent Title: Method and device for a DRAM capacitor having low depletion ratio
- Patent Title (中): 具有低耗尽率的DRAM电容器的方法和装置
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Application No.: US13078917Application Date: 2011-04-01
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Publication No.: US08426286B2Publication Date: 2013-04-23
- Inventor: Cheng Yang , Bo Tao , Jason Luo , Jingang Wu
- Applicant: Cheng Yang , Bo Tao , Jason Luo , Jingang Wu
- Applicant Address: CN Shanghai
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee Address: CN Shanghai
- Agency: Kilpatrick Townsend & Stockton
- Priority: CN201010154714 20100414
- Main IPC: H01L21/20
- IPC: H01L21/20
Abstract:
A method of manufacturing a semiconductor integrated circuit device having low depletion ratio capacitor comprising: forming hemispherical grains (HSG) on a poly-silicon; doping the hemispherical grained polysilicon in a phosphine gas; and rapid thermal oxidizing the doped hemispherical grained polysilicon at 850° C. for 10 seconds. The method further comprises nitridizing the rapid thermal oxidized hemispherical-grained polysilicon and depositing a alumina film on the silicon nitride layer. A semiconductor integrated circuit device having a low depletion ratio capacitor according to the disclosed manufacturing method is provided.
Public/Granted literature
- US20110254127A1 METHOD AND DEVICE FOR A DRAM CAPACITOR HAVING LOW DEPLETION RATIO Public/Granted day:2011-10-20
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