Invention Grant
- Patent Title: CMOS devices with Schottky source and drain regions
- Patent Title (中): 具有肖特基源极和漏极区域的CMOS器件
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Application No.: US13113530Application Date: 2011-05-23
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Publication No.: US08426298B2Publication Date: 2013-04-23
- Inventor: Chih-Hsin Ko , Hung-Wei Chen , Chung-Hu Ke , Wen-Chin Lee
- Applicant: Chih-Hsin Ko , Hung-Wei Chen , Chung-Hu Ke , Wen-Chin Lee
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/44

Abstract:
A semiconductor structure includes a semiconductor substrate, and an NMOS device at a surface of the semiconductor substrate, wherein the NMOS device comprises a Schottky source/drain extension region. The semiconductor structure further includes a PMOS device at the surface of the semiconductor substrate, wherein the PMOS device comprises a source/drain extension region comprising only non-metal materials. Schottky source/drain extension regions may be formed for both PMOS and NMOS devices, wherein the Schottky barrier height of the PMOS device is reduced by forming the PMOS device over a semiconductor layer having a low valence band.
Public/Granted literature
- US20110223727A1 CMOS Devices with Schottky Source and Drain Regions Public/Granted day:2011-09-15
Information query
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