Invention Grant
- Patent Title: Method of fabricating integrated circuitry
- Patent Title (中): 集成电路的制造方法
-
Application No.: US13069005Application Date: 2011-03-22
-
Publication No.: US08426305B2Publication Date: 2013-04-23
- Inventor: Hasan Nejad , James E. Green
- Applicant: Hasan Nejad , James E. Green
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
The invention includes methods of fabricating integrated circuitry. In one implementation, at least two different elevation conductive metal lines are formed relative to a substrate. Then, interconnecting vias are formed in a common masking step between, a) respective of the at least two different elevation conductive metal lines, and b) respective conductive nodes. Interconnecting conductive metal is provided within the interconnecting vias. Other aspects and implementations are contemplated.
Public/Granted literature
- US20110171825A1 Method of Fabricating Integrated Circuitry Public/Granted day:2011-07-14
Information query
IPC分类:
