Invention Grant
US08426306B1 Three dimension programmable resistive random accessed memory array with shared bitline and method
有权
具有共享位线和方法的三维可编程电阻随机存取存储器阵列
- Patent Title: Three dimension programmable resistive random accessed memory array with shared bitline and method
- Patent Title (中): 具有共享位线和方法的三维可编程电阻随机存取存储器阵列
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Application No.: US13341835Application Date: 2011-12-30
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Publication No.: US08426306B1Publication Date: 2013-04-23
- Inventor: Harry Gee , Sung Hyun Jo , Hagop Nazarian , Scott Brad Herner
- Applicant: Harry Gee , Sung Hyun Jo , Hagop Nazarian , Scott Brad Herner
- Applicant Address: US CA Santa Clara
- Assignee: Crossbar, Inc.
- Current Assignee: Crossbar, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Ogawa P.C.
- Main IPC: H01L21/4763
- IPC: H01L21/4763
Abstract:
A method of forming a non-volatile memory device. The method forms a vertical stack of first polysilicon material and a second polysilicon material layer isolated by a dielectric material. The polysilicon material layers and the dielectric material are subjected to a first pattern and etch process to form a first wordline associated with a first switching device and a second wordline associated with a second switching device from the first polysilicon material layer, and a third wordline associated with a third switching device and a fourth wordline associated with a fourth switching device from the second polysilicon material. A via opening is formed to separate the first wordline from the second wordline and to separate the third wordline from the fourth wordline. An amorphous silicon switching material is deposited conformably overlying the via opening. A metal material fills the via opening and connects to a common bitline.
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