Invention Grant
US08426890B2 Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces
有权
具有提高硅表面III-V化合物外延质量的半导体器件和制造方法
- Patent Title: Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces
- Patent Title (中): 具有提高硅表面III-V化合物外延质量的半导体器件和制造方法
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Application No.: US13461595Application Date: 2012-05-01
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Publication No.: US08426890B2Publication Date: 2013-04-23
- Inventor: Cheng-Hsien Wu , Chih-Hsin Ko , Clement Hsingjen Wann
- Applicant: Cheng-Hsien Wu , Chih-Hsin Ko , Clement Hsingjen Wann
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman Ham & Berner, LLP
- Main IPC: H01L31/102
- IPC: H01L31/102
Abstract:
Stacking faults are reduced or eliminated by epitaxially growing a III-V compound semiconductor region in a trench followed by capping and annealing the region. The capping layer limits the escape of atoms from the region and enables the reduction or elimination of stacking faults along with the annealing.
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