Invention Grant
US08426946B2 Laminated semiconductor substrate, laminated chip package and method of manufacturing the same 有权
层叠半导体衬底,层压芯片封装及其制造方法

Laminated semiconductor substrate, laminated chip package and method of manufacturing the same
Abstract:
In a laminated semiconductor substrate, a plurality of semiconductor substrates are laminated. Each of the semiconductor substrate has a plurality of scribe-groove parts formed along scribe lines. Further, each of the semiconductor substrate has a plurality of device regions insulated from each other and has a semiconductor device formed therein, a first wiring electrode and a second wiring electrode extend to the inside of a interposed groove part from a first device region and a second device region respectively, and are separated from each other. In the laminated semiconductor substrate, a through hole which the first wiring electrode appears is formed. The laminated semiconductor substrate has a through electrode. The through electrode is contact with all of the first wiring electrodes appearing in the through hole. The laminated semiconductor substrate has a plurality of laminated chip regions.
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