Invention Grant
US08427889B2 Memory device and associated main word line and word line driving circuit
有权
存储器件和相关的主字线和字线驱动电路
- Patent Title: Memory device and associated main word line and word line driving circuit
- Patent Title (中): 存储器件和相关的主字线和字线驱动电路
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Application No.: US12713708Application Date: 2010-02-26
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Publication No.: US08427889B2Publication Date: 2013-04-23
- Inventor: Min Chung Chou
- Applicant: Min Chung Chou
- Applicant Address: TW Hsinchu
- Assignee: Elite Semiconductor Memory Technology Inc.
- Current Assignee: Elite Semiconductor Memory Technology Inc.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C.
- Agent Anthony King
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A main word line driving circuit for driving word lines in a memory device comprises first and second level shifting units and an inverting unit. The first level shifting unit is configured to convert a decode signal into a first operative signal, and the second level shifting unit is configured to convert the decode signal into a second operative signal. The inverting unit is configured to receive the first and second operative signals. A supply voltage of the first level shifting unit is selectively switched to a first bias voltage when the plurality of word lines are selected or partially selected and switched the output voltage to a second bias voltage when the plurality of word lines are deselected.
Public/Granted literature
- US20110211398A1 MEMORY DEVICE AND ASSOCIATED MAIN WORD LINE AND WORD LINE DRIVING CIRCUIT Public/Granted day:2011-09-01
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