Invention Grant
- Patent Title: Method for locking a synthesised output signal of a synthesised waveform synthesiser in a phase relationship
- Patent Title (中): 用于以相位关系锁定合成波形合成器的合成输出信号的方法
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Application No.: US12546738Application Date: 2009-08-25
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Publication No.: US08428213B2Publication Date: 2013-04-23
- Inventor: Hans Juergen Tucholski
- Applicant: Hans Juergen Tucholski
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Kenyon & Kenyon LLP
- Main IPC: H03D3/24
- IPC: H03D3/24

Abstract:
A digital waveform synthesizer (1) is implemented as a single chip integrated circuit on a single chip (2) and comprises a direct digital synthesizer (10) which produces a synthesized output signal waveform on an output terminal (4) which is substantially phase and frequency locked to the phase and frequency of an externally generated input signal applied to an input terminal (5). A comparing circuit (20) compares the period of the synthesized output signal waveform on the output terminal (4) with the period of the input signal, and a control circuit (28) produces progressively altered values of a frequency control digital word which are sequentially applied to an accumulator (11) of the direct digital synthesizer (10) in response to the comparing circuit (20), until the value of the frequency control digital word applied to the accumulator (11) is such as to produce the synthesized output signal waveform to be substantially phase and frequency locked to the phase and frequency input signal applied to the input terminal (5).
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