The apparatus includes: a register unit in which a start address of a macro-command to be executed, is selected from macro-commands included in a command script in which at least one macro-command in which a plurality of micro-commands for controlling a unit operation of NAND flash memory are arranged in an array shape, is recorded; a command fetch unit accessing first memory connected based on the start address of the macro-command to be executed and sequentially reading the plurality of micro-commands from the start address of the macro-command to be executed; a command interpretation unit interpreting the read micro-commands and outputting the result of interpretation including types of the micro-commands and command parameters; and a command execution unit generating interface signals for controlling an operation of NAND flash memory according to each of the micro-commands based on the result of interpretation.