Invention Grant
- Patent Title: Predictive modeling of interconnect modules for advanced on-chip interconnect technology
- Patent Title (中): 用于先进片上互连技术的互连模块的预测建模
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Application No.: US12474297Application Date: 2009-05-29
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Publication No.: US08429577B2Publication Date: 2013-04-23
- Inventor: Xia Li , Wei Zhao , Yu Cao , Shiqun Gu , Seung H. Kang , Matthew Nowak
- Applicant: Xia Li , Wei Zhao , Yu Cao , Shiqun Gu , Seung H. Kang , Matthew Nowak
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Michelle Gallardo
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F17/50

Abstract:
A computer program product estimates performance of an interconnect structure of a semiconductor integrated circuit (IC). The program product includes code executing on a computer to calculate at least one electrical characteristic of the interconnect structure based on input data accounting for multiple layers of the interconnect structure. The electrical characteristics can be capacitance, resistance, and/or inductance. The capacitance may be based upon multiple components, including a fringe capacitance component, a terminal capacitance component, and a coupling capacitance component.
Public/Granted literature
- US20090327983A1 Predictive Modeling of Interconnect Modules for Advanced On-Chip Interconnect Technology Public/Granted day:2009-12-31
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