Invention Grant
- Patent Title: Method for decomposing a designed pattern layout
- Patent Title (中): 分解设计图案布局的方法
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Application No.: US13406124Application Date: 2012-02-27
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Publication No.: US08429587B2Publication Date: 2013-04-23
- Inventor: Cheol Kyun Kim
- Applicant: Cheol Kyun Kim
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Marshall, Gerstein & Borun LLP
- Priority: KR10-2008-0069614 20080717
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method for decomposing a designed pattern layout and a method for fabricating an exposure mask using the same. After the designed pattern layout is automatically decomposed to obtain a plurality of mask layouts, a problematic region is determined through simulation of the mask layout, and fed back to correct the designed pattern layout. As a result, problems can be detected in each process and corrected to reduce the process time.
Public/Granted literature
- US20120167018A1 Method for Decomposing a Designed Pattern Layout Public/Granted day:2012-06-28
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