Semiconductor integrated circuit
Abstract:
An object of the present invention is to solve a problem that, if the state of a macro that is a debug target changes by a factor other than a debugger while the debugger debugs the macro as a target, the debugger becomes unable to continue debugging and the debugging terminates abnormally. In order to solve the aforementioned problem, disclosed is a semiconductor integrated circuit including a first register that stores a value indicating that the macro is in a reset state in response to a reset signal received during debugging of the macro, and a second register that stores a value indicating whether or not the macro has been in the reset state in the past by receiving a reset signal.
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