Invention Grant
- Patent Title: Semiconductor integrated circuit
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Application No.: US12232073Application Date: 2008-09-10
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Publication No.: US08429615B2Publication Date: 2013-04-23
- Inventor: Shuichi Kunie , Hiroki Machimura
- Applicant: Shuichi Kunie , Hiroki Machimura
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2007-249083 20070926
- Main IPC: G06F9/45
- IPC: G06F9/45

Abstract:
An object of the present invention is to solve a problem that, if the state of a macro that is a debug target changes by a factor other than a debugger while the debugger debugs the macro as a target, the debugger becomes unable to continue debugging and the debugging terminates abnormally. In order to solve the aforementioned problem, disclosed is a semiconductor integrated circuit including a first register that stores a value indicating that the macro is in a reset state in response to a reset signal received during debugging of the macro, and a second register that stores a value indicating whether or not the macro has been in the reset state in the past by receiving a reset signal.
Public/Granted literature
- US20090083712A1 Semiconductor integrated circuit Public/Granted day:2009-03-26
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