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Invention Grant
US08431834B2 Method for assuring counterbore depth of vias on printed circuit boards and printed circuit boards made accordingly 有权
确保印刷电路板和印刷电路板上的通孔的沉孔深度的方法

  • Patent Title: Method for assuring counterbore depth of vias on printed circuit boards and printed circuit boards made accordingly
  • Patent Title (中): 确保印刷电路板和印刷电路板上的通孔的沉孔深度的方法
  • Application No.: US12485375
    Application Date: 2009-06-16
  • Publication No.: US08431834B2
    Publication Date: 2013-04-30
  • Inventor: Craig Twardy , Robert McDonald
  • Applicant: Craig Twardy , Robert McDonald
  • Applicant Address: US MD Hanover
  • Assignee: Ciena Corporation
  • Current Assignee: Ciena Corporation
  • Current Assignee Address: US MD Hanover
  • Agency: Clements Bernard PLLC
  • Agent Christopher L. Bernard; Lawrence A. Baratta, Jr.
  • Main IPC: H05K1/11
  • IPC: H05K1/11
Method for assuring counterbore depth of vias on printed circuit boards and printed circuit boards made accordingly
Abstract:
A method is disclosed for fabricating a PCB so that is can easily be determined if a via in the PCB has not been counterbored to a desired depth. A PCB fabricated according to the method also is disclosed.
Abstract(Chinese):

公开了一种用于制造PCB的方法，使得如果PCB中的通孔没有被吸入到期望的深度，则可以容易地确定。 公开了根据该方法制造的PCB。

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