Invention Grant
- Patent Title: Manufacturing method of semiconductor device and manufacturing method of mask
- Patent Title (中): 半导体器件的制造方法和掩模的制造方法
-
Application No.: US12563265Application Date: 2009-09-21
-
Publication No.: US08435702B2Publication Date: 2013-05-07
- Inventor: Tsuneo Terasawa , Takeshi Yamane
- Applicant: Tsuneo Terasawa , Takeshi Yamane
- Applicant Address: JP Kawasaki-shi JP Tokyo
- Assignee: Renesas Electronics Corporation,Kabushiki Kaisha Toshiba
- Current Assignee: Renesas Electronics Corporation,Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Kawasaki-shi JP Tokyo
- Agency: Miles & Stockbridge P.C.
- Priority: JP2008-254046 20080930
- Main IPC: G03F1/00
- IPC: G03F1/00

Abstract:
Provided is a technique capable of improving the dimensional accuracy of a transfer pattern in a lithography technique in which EUV light is used and the EUV light is incident obliquely on a mask and an image of the EUV light reflected from the mask is formed on a semiconductor substrate (resist film), thereby transferring the pattern formed on the mask onto the semiconductor substrate. The present invention is based on a lithography technique in which EUV light is used and an exposure optical system in which the EUV light is obliquely incident on a mask is used. In this lithography technique, an absorber and a difference in level are formed on the mask, and a projective component projected on a mask surface out of a direction cosine component of the incident light is set to be almost orthogonal to an extending direction of the difference in level.
Public/Granted literature
- US20100080647A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF MASK Public/Granted day:2010-04-01
Information query