Invention Grant
- Patent Title: Panel based lead frame packaging method and device
- Patent Title (中): 面板式引线框封装方法及装置
-
Application No.: US12638827Application Date: 2009-12-15
-
Publication No.: US08435837B2Publication Date: 2013-05-07
- Inventor: Chen Lung Tsai , Long-Ching Wang , Tze-Pin Lin
- Applicant: Chen Lung Tsai , Long-Ching Wang , Tze-Pin Lin
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP (US)
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A packaged semiconductor die has a preformed lead frame with a central recessed portion, and a plurality of conductive leads. An integrated circuit die has a top surface and a bottom surface opposite thereto, with the top surface having a plurality of bonding pads for electrical connection to the die. The die is positioned in the central recessed portion with the top surface having the bonding pads facing upward, and the bottom surface in contact with the recessed portion. Each of the leads has a top portion and a bottom portion. The leads are spaced apart and insulated from the central recessed portion. A conductive layer is deposited on the top surface of the die and the top portion of the leads and is patterned to electrically connect certain of the bonding pads of the die to certain of the conductive leads. An insulator covers the conductive layer. The present invention also relates to a method of packaging such an integrated circuit die.
Public/Granted literature
- US20110140254A1 Panel Based Lead Frame Packaging Method And Device Public/Granted day:2011-06-16
Information query
IPC分类: