Invention Grant
- Patent Title: Semiconductor integrated circuit device and a method for manufacturing a semiconductor integrated circuit device
- Patent Title (中): 半导体集成电路装置及半导体集成电路装置的制造方法
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Application No.: US12650537Application Date: 2009-12-30
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Publication No.: US08435868B2Publication Date: 2013-05-07
- Inventor: Hisao Shigihara , Hiromi Shigihara , Akira Yajima
- Applicant: Hisao Shigihara , Hiromi Shigihara , Akira Yajima
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2009-009914 20090120; JP2009-230239 20091002
- Main IPC: H01L21/302
- IPC: H01L21/302

Abstract:
With a general wafer level package process, in order to prevent corrosion of an aluminum type pad electrode in a scribe region in a plating process, the pad electrode is covered with a pad protective resin film at the same layer as an organic type protective film in a product region. However, this makes it impossible to perform the probe test on the pad electrode in the scribe region after rewiring formation. The present invention provides a method for manufacturing a semiconductor integrated circuit device of a wafer level package system. The organic type protective films in the chip regions and the scribe region are mutually combined to form an integral film pattern. In a pelletization step, the surface layer portion including the organic type protective film at the central part of the scribe region is first removed by laser grooving, to form a large-width groove. Then, a dicing processing of the central part in this groove results in separation into the chip regions.
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