Invention Grant
- Patent Title: Semiconductor device including normally-off type junction transistor and method of manufacturing the same
- Patent Title (中): 包括常闭型结型晶体管的半导体器件及其制造方法
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Application No.: US12639054Application Date: 2009-12-16
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Publication No.: US08436397B2Publication Date: 2013-05-07
- Inventor: Haruka Shimizu , Natsuki Yokoyama
- Applicant: Haruka Shimizu , Natsuki Yokoyama
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2008-325724 20081222
- Main IPC: H01L29/80
- IPC: H01L29/80

Abstract:
In a junction FET of a normally-off type, a technique capable of achieving both of improvement of a blocking voltage and reduction of an ON resistance is provided. In a junction FET using silicon carbide as a substrate material, impurities are doped to a vicinity of a p-n junction between a gate region and a channel-formed region, the impurities having a conductive type which is reverse to that of impurities doped in the gate region and same as that of impurities doped in the channel-formed region. In this manner, an impurity profile of the p-n junction becomes abrupt, and further, an impurity concentration of a junction region forming the p-n junction with the gate region in the channel-formed region is higher than those of a center region in the channel-formed region and of an epitaxial layer.
Public/Granted literature
- US20100163935A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2010-07-01
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