Invention Grant
- Patent Title: Multi-layered semiconductor apparatus
- Patent Title (中): 多层半导体装置
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Application No.: US13528220Application Date: 2012-06-20
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Publication No.: US08436680B2Publication Date: 2013-05-07
- Inventor: Isao Sugaya , Kazuya Okamoto
- Applicant: Isao Sugaya , Kazuya Okamoto
- Applicant Address: JP Tokyo
- Assignee: Nikon Corporation
- Current Assignee: Nikon Corporation
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
- Priority: JP2007-196767 20070727; JP2007-325604 20071218
- Main IPC: H01L25/00
- IPC: H01L25/00

Abstract:
Provided is a multi-layered semiconductor apparatus with improved heat diffusion and improved heat release. The multi-layered semiconductor apparatus (100) includes a plurality of layered semiconductor chips (20-1, 20-2) that each include at least one circuit region, and the circuit regions are arranged such that heat generated by the circuit regions as a result of the circuit regions being driven is spread out. The multi-layered semiconductor apparatus (100) further comprises a heat releasing section (50) that releases the heat generated by the circuit regions, and the circuit regions are arranged such that there is less thermal resistance between the heat releasing section and circuit regions that generate a greater amount of heat per unit area.
Public/Granted literature
- US20120256679A1 MULTI-LAYERED SEMICONDUCTOR APPARATUS Public/Granted day:2012-10-11
Information query
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